1. Field of the Invention
The present invention relates generally to a semiconductor structure and process thereof, and more specifically to a semiconductor structure and process thereof that includes at least two transistors having different spacers.
2. Description of the Prior Art
For decades, chip manufacturers have made metal-oxide-semiconductor (MOS) transistors faster by making them smaller. As the semiconductor processes advance to the very deep sub micron era such as 65-nm node or beyond, how to increase the driving current for MOS transistors has become a critical issue. In order to improve device performance, crystal strain technology has been developed. Crystal strain technology is becoming more and more attractive as a means for getting better performance in the field of MOS transistor fabrication. Putting a strain on a semiconductor crystal alters the speed at which charges move through that crystal. Strain makes MOS transistors work better by enabling electrical charges, such as electrons, to pass more easily through the silicon lattice of the gate channel.
Attempts have been made to use a strained silicon layer, which has been grown epitaxially on a silicon substrate with a silicon germanium (SiGe) structure or a silicon carbide (SiC) structure disposed therebetween. In this type of MOS transistor, a biaxial tensile strain occurs in the epitaxy silicon structure due to the silicon germanium or silicon carbide having a larger or smaller lattice constant than silicon; as a result, the band structure alters, and the carrier mobility increases. This enhances the speed performance of the MOS transistors.
As epitaxial structures such as the silicon germanium (SiGe) structure or silicon carbide (SiC) structure are applied in transistors in different types of electrical circuit areas (such as a logical electrical circuit area or a high voltage electrical circuit area), the electrical performances of the transistors in each area induced by the epitaxial structures may not be the same, for reasons related to size, structure or forming methods of gate structures in each area. The electrical demands and the applications of the transistors in different electrical circuit areas may also be different.
Therefore, an important issue in the current semiconductor industry is how to form transistors in electrical circuit which apply crystal strain technology using a simplified process that can still reach desired electrical standards.